Low latency switches used in HFT

Top of rack switches allow multiple servers to share the same exchange connection. Their role is expanding, however, as they now come with internal FPGAs. There seem to be only two competitive product lines, which I’ll describe here.


Arista’s most notable acquisition was Metamako in 2018.[ref]https://www.arista.com/en/company/news/press-release/6070-pr-20180912[/ref]

ModelReleasedLatency (ns)

The 7130 is the current Arista flagship for low-latency applications. The price is apparently on the order of $100k.[ref]https://itprice.com/arista-price-list/7130.html[/ref] This switch combines ASICs, FPGAs, and a CPU:

The 7130LBR Series are 96 port systems combining the ultra low latency Layer 1 X-Point with two high performance FPGAs, Broadcom Jericho2 switching silicon, a powerful CPU and precision timing hardware, enabling consolidation of network, server and custom FPGA applications into a highly compact form factor. Compared to traditional multi-box approaches, the 7130LBR reduces device and network hop count, cabling, power and cost while providing orders of magnitude density and latency improvements through co-location of these key components.[ref]https://www.helpnetsecurity.com/2022/06/03/arista-networks-7130-series/[/ref]


Cisco’s most notable acquisition was Exablaze in 2020.[ref]https://www.cisco.com/c/en/us/about/corporate-strategy-office/acquisitions/exablaze.html[/ref]

ModelReleasedLatency (ns)
Nexus 35482012250[ref]https://blog.router-switch.com/2012/10/cisco-nexus-3548-arista-7150-dueling-ultra-low-latency-switches/[/ref]
Nexus 3550-T2021130[ref]https://www.cisco.com/c/en/us/products/switches/nexus-3550-series/model-comparison.html[/ref]

It appears the 3550-T costs $60k plus around $10k/yr for a software license.[ref]https://itprice.com/cisco-gpl/3550-t[/ref]

The Cisco Nexus 3550-T Programmable Network Platform has a fixed form factor that is built around a dynamically reconfigurable FPGA (Field Programmable Gate Array) and provides 48 ports that are 25G capable along with an x86 (Intel® Atom® processor with 8 cores up to 1.7 GHz)–management CPU. All 48 ports are directly connected to Xilinx Virtex UltraScale Plus VU35P FPGA with a “-3” speed grade. The FPGA has 8GB of High Bandwidth Memory (HBM) on board.[ref]https://www.cisco.com/c/en/us/products/collateral/switches/nexus-3550-series/datasheet-c78-744762.html[/ref]

Rubidium Atomic Clocks

These switches have highly-accurate clocks that can be synced to a GPS master clock using PTP or PPS. They have a very useful timestamping feature. As packets fly through, the switches insert a high-precision timestamp into an unused part of the packet headers.[ref]https://www.arista.com/assets/data/pdf/Whitepapers/Overview_Arista_Timestamps.pdf[/ref] And they do it in less than a nanosecond.

These timestamps are important when running simulations on captured data, particularly when multiple market data feeds are involved.

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